1. Technical Field
The present invention relates to a method and system for data processing in general, and in particular to a method and system for providing support for software partitioning. Still more particularly, the present invention relates to a method and system for supporting software partition and dynamic reconfiguration within a non-uniform memory access system.
2. Description of the Prior Art
With the ever increasing demand for computing power, computer architectures are driven from uniprocessor designs towards multiprocessor designs. While uniprocessor systems are typically limited to processing only a few instructions simultaneously, a multiprocessor system can execute more instructions in parallel with a higher processing speed.
Within a multiprocessor system, a group of processors is typically defined as a node where each processor within the node may concurrently execute instructions from one or more processes to enable efficient parallel processing of those processes. Some advanced multiprocessor systems may even assign processes to different nodes within the multiprocessor system in order to provide more efficient parallel processing of multiple processes.
In a tightly coupled multiprocessor system, all processors, which share a single memory system, are typically interconnected by a high-speed, circuit-switched inter-connection network. The processors are also controlled by the same control program and can communicate directly with each other. When an application program spawns several tasks, the operating system may assign these tasks to different processors. For processes that do not generate subprocesses, a multi-tasking operating system can regard all processors of a multiprocessor system as a simple set of computational resources.
An emerging memory architecture stemming from the class of tightly coupled multiprocessor systems is known as a non-uniform memory access (NUMA) architecture. The NUMA architecture provides overall speed advantages that are not seen in the prior art multiprocessor systems. Also, the NUMA architecture can combine massive scalability of hundreds of processors with the simplified programming model of symmetric multiprocessor (SMP) technology. Generally speaking, a NUMA computer system is a set of SMP nodes interconnected with a high bandwidth interconnection that allows all processors to access any of the main memory within the NUMA computer system. Each processor node shares the same addressable main storage, which is distributed among all the local memory of all the processor nodes. The access time to the local memory within a processor node is the same for all processors within the processor node. Access to a memory on another processor node, however, has a much greater access latency than a similar access to a local memory. Given this greater latency of accesses to the non-local memory, system performance could be enhanced if the memory management facility of the operating system is capable of managing the use of data storage such that the percentage of memory accesses to non-local memories are minimized.
More precisely, a NUMA computer system can be characterized as an interconnection of a set of SMP nodes, with each SMP node containing:
a) 0 to N processors; PA1 b) cache memories, connected individually to each processor and/or to subsets of a node's processors; PA1 c) a main memory; and PA1 d) potentially one or more connections to I/O busses and devices.
The contents of every node's main storage is accessible by all processors within the NUMA computer system. The contents of the main storage in processor caches (or caches of processor subsets) is capable of remaining coherent with all changes made to the contents of any local memory. The term "local" is defined to mean those processors and main memory that are on the same processor node and the term "non-local" as main memory and processors that are on different nodes. The access time (cache linefill latency for example) for a processor to read or write the contents of a main memory that is local tends to be faster than the access time to a non-local main memory. Storage ordering and atomicity can also be maintained.
The present disclosure is related to a method and system for supporting software partition and dynamic reconfiguration within a NUMA computer system.